INTERNATIONAL PATENT: MICRON TECHNOLOGY, INC. FILES APPLICATION FOR "MEMORY SUB-SYSTEM FOR MANAGING BLOCK STRIPE ASSIGNMENT BASED ON BLOCK ERROR CONDITIONS"

GENEVA, Dec. 10 -- MICRON TECHNOLOGY, INC. (8000 South Federal WayBoise, Idaho 83716) filed a patent application (PCT/US2025/031272) for "MEMORY SUB-SYSTEM FOR MANAGING BLOCK STRIPE ASSIGNMENT BASED ON BLOCK ERROR CONDITIONS" on May 28, 2025. With publication no. WO/2025/250698, the details related to the patent application was published on Dec 04, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): NOORUDHEEN, Noorshaheen Mavungal (3800 Pike Road, #4106Longmont, Colorado 80503), STONELAKE, Paul Roger (186 Kawailani CircleKihei, Hawaii 96753), HARRIS, Byron D. (3786 Singletree CourtMead, Colorad...