INTERNATIONAL PATENT: MICRON TECHNOLOGY, INC. FILES APPLICATION FOR "MEMORY SUB-SYSTEM FOR ALLOCATING BLOCK STRIPES BASED ON PROGRAM ERASE CYCLES"

GENEVA, Dec. 10 -- MICRON TECHNOLOGY, INC. (8000 South Federal WayBoise, Idaho 83716) filed a patent application (PCT/US2025/031273) for "MEMORY SUB-SYSTEM FOR ALLOCATING BLOCK STRIPES BASED ON PROGRAM ERASE CYCLES" on May 28, 2025. With publication no. WO/2025/250699, the details related to the patent application was published on Dec 04, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): STONELAKE, Paul Roger (186 Kawailani CircleKihei, Hawaii 96753), HARRIS, Byron D. (3786 Singletree CourtMead, Colorado 80542), NOORUDHEEN, Noorshaheen Mavungal (3800 Pike Road, #4106Longmont, Colorado 80503) ...