GENEVA, Oct. 15 -- MICRON TECHNOLOGY, INC. (8000 S. Federal WayBoise, Idaho 83716-9632) filed a patent application (PCT/US2025/022352) for "MEMORY DEVICE STAIRCASE FORMATION" on Mar 31, 2025. With publication no. WO/2025/212529, the details related to the patent application was published on Oct 09, 2025.
Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).
Inventor(s): VENKATESAN, Srivatsan (8000 S. Federal WayBoise, Idaho 83716-9632), KAVALIPURAPU, Kalyan Chakravarthy (8000 S. Federal WayBoise, Idaho 83716-9632)
Abstract: Methods, systems, and devices for memory device staircase formation are described. A memory ...