INTERNATIONAL PATENT: MICRON TECHNOLOGY, INC. FILES APPLICATION FOR "MEMORY ARCHITECTURES WITH PARTIALLY FILLED PIERS"

GENEVA, Nov. 18 -- MICRON TECHNOLOGY, INC. (8000 S. Federal WayBoise, Idaho 83716-9632) filed a patent application (PCT/US2025/026665) for "MEMORY ARCHITECTURES WITH PARTIALLY FILLED PIERS" on Apr 28, 2025. With publication no. WO/2025/235243, the details related to the patent application was published on Nov 13, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): VENIGALLA, Rajasekhar (8000 S. Federal WayBoise, Idaho 83716-9632), FANTINI, Paolo (8000 S. Federal WayBoise, Idaho 83716-9632), GOOD, Farrell M. (8000 S. Federal WayBoise, Idaho 83716-9632), FRATIN, Lorenzo (8000 S. Federal WayBoise, ...