GENEVA, July 21 -- MICRON TECHNOLOGY, INC. (8000 S. Federal Way, P.O. Box 6Boise, ID 83707-0006) filed a patent application (PCT/US2024/062256) for "CACHE MEMORIES IN VERTICALLY INTEGRATED MEMORY SYSTEMS AND ASSOCIATED SYSTEMS AND METHODS" on Dec 30, 2024. With publication no. WO/2025/151300, the details related to the patent application was published on Jul 17, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): SREERAMANENI, Raghukiran (c/o Micron Technology, Inc.8000 S. Federal Way, P.O. Box 6Boise, ID 83707-0006), YANG, Lingming (c/o Micron Technology, Inc.8000 S. Federal Way, P.O. Box 6Bois...