GENEVA, April 16 -- MICRON TECHNOLOGY, INC. (8000 South Federal WayBoise, Idaho 83716) filed a patent application (PCT/US2024/039192) for "APPARATUSES AND METHODS FOR SCALABLE 1-PASS ERROR CORRECTION CODE OPERATIONS" on Jul 23, 2024. With publication no. WO/2025/075696, the details related to the patent application was published on Apr 10, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): AYYAPUREDDI, Sujeet (c/o Micron Technology, Inc.8000 South Federal WayBoise, Idaho 83716-9632)

Abstract: Apparatuses, systems, and methods for scalable 1-pass error correction code operations. A memory dev...