GENEVA, Oct. 13 -- GUPTA, Nitin (23052, Prestige Shantiniketan, Whitefield Main Road, BangaloreKarnataka 560048) filed a patent application (PCT/IB2024/054944) for "DIGITAL PHASE-LOCKED LOOP CIRCUIT AND A METHOD THEREOF" on May 22, 2024. With publication no. WO/2025/210393, the details related to the patent application was published on Oct 09, 2025.
Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).
Inventor(s): GUPTA, Nitin (23052, Prestige Shantiniketan, Whitefield Main Road, BangaloreKarnataka 560048)
Abstract: The present disclosure relates to a digital phase-locked loop (PLL) circuit (100). The digital PLL ...