INTERNATIONAL PATENT: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD., JERGOVIC, ILIJA FILES APPLICATION FOR "LOAD TRANSIENT MINIMIZATION NEAR ZERO CROSSING OF VALLEY CURRENT OF POWER INDUCTOR IN A POWER CONVERTER"

GENEVA, Nov. 18 -- CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. (7B Nightingale WayQuartermileEdinburgh EH3 9EG), JERGOVIC, Ilija (c/o Cirrus Logic Inc.800 West 6th StreetAustin, Texas 78701) filed a patent application (PCT/US2025/024327) for "LOAD TRANSIENT MINIMIZATION NEAR ZERO CROSSING OF VALLEY CURRENT OF POWER INDUCTOR IN A POWER CONVERTER" on Apr 11, 2025. With publication no. WO/2025/235150, the details related to the patent application was published on Nov 13, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): KOSEOGLOU, Markos (c/o Cirrus Logic Inc.800 W. 6th StreetAustin, Texas 7870...