INTERNATIONAL PATENT: ASCENIUM, INC. FILES APPLICATION FOR "SEMANTIC ORDERING FOR PARALLEL ARCHITECTURE WITH COMPUTE SLICES"

GENEVA, March 18 -- ASCENIUM, INC. (809 Cuesta Drive, Suite BMountain View, CA 94040) filed a patent application (PCT/US2024/045453) for "SEMANTIC ORDERING FOR PARALLEL ARCHITECTURE WITH COMPUTE SLICES" on Sep 06, 2024. With publication no. WO/2025/054375, the details related to the patent application was published on Mar 13, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): TAYLOR, Jacob John, Vorland (Vaekeroveien 106d0383 Oslo)

Abstract: Techniques for managing compute slice tasks are disclosed. A processing unit comprising compute slices, load-store units (LSUs), a control unit, and a m...