INTERNATIONAL PATENT: AMPERE COMPUTING LLC FILES APPLICATION FOR "CACHE MEMORY SYSTEM EMPLOYING A MULTIPLE-LEVEL HIERARCHY CACHE COHERENCY ARCHITECTURE"

GENEVA, Aug. 6 -- AMPERE COMPUTING LLC (4655 Great America ParkwaySuite 601Santa Clara, California 95054) filed a patent application (PCT/US2025/012572) for "CACHE MEMORY SYSTEM EMPLOYING A MULTIPLE-LEVEL HIERARCHY CACHE COHERENCY ARCHITECTURE" on Jan 22, 2025. With publication no. WO/2025/160156, the details related to the patent application was published on Jul 31, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): SHANNON, Richard James (4655 Great America ParkwaySuite 601Santa Clara, California 95054)

Abstract: Cache memory systems employing multiple-level hierarchy cache coherency archi...