INTERNATIONAL PATENT: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC. FILES APPLICATION FOR "THROUGH SUBSTRATE VIA STRUCTURES AND PROCESSES"

GENEVA, April 8 -- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC. (3025 Orchard ParkwaySan Jose, California 95134) filed a patent application (PCT/US2024/047818) for "THROUGH SUBSTRATE VIA STRUCTURES AND PROCESSES" on Sep 20, 2024. With publication no. WO/2025/072061, the details related to the patent application was published on Apr 03, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): KATKAR, Rajesh (c/o Adeia Semiconductor Bonding Technologies Inc.3025 Orchard ParkwaySan Jose, California 95134), UZOH, Cyprian, Emeka (c/o Adeia Semiconductor Bonding Technologies Inc.3025 Orchard ParkwaySan Jo...