Intellectual Property India Publishes Patent Application for 'Reduced Training For Main Band Chip Module Interconnection Clock Lines' Filed by Qualcomm Incorporated

MUMBAI, India, Nov. 7 -- Intellectual Property India has published a patent application (202547096550 A) filed by Qualcomm Incorporated, San Diego, on Oct. 7, for 'reduced training for main band chip module interconnection clock lines.'

Inventor(s) include Godavarthi Lekhya Pavani; Doddi Ravindranath; Ramireddy Harinatha Reddy; Haider Afreen; and V Umamaheshwaran.

The application for the patent was published on Nov. 7, under issue no. 45/2025.

According to the abstract released by the Intellectual Property India: "Aspects relate to reduced training for main band chip module interconnection clock lines. In one example a method includes sending iterations of a first training pattern from a module of a first die to a module partner of a sec...