UMBAI, India, Jan. 2 -- Intellectual Property India has published a patent application (202541125279 A) filed by B V Raju Institute Of Technology, Narsapur, Telangana, on Dec. 11, 2025, for 'method for reducing computational cost in quantum circuits via gate optimization.'

Inventor(s) include Mummadi Swathi; S Akshaya; D Rohitha; and G Srinath.

The application for the patent was published on Jan. 2, under issue no. 01/2026.

According to the abstract released by the Intellectual Property India: "Efficient quantum gate optimization is essential for enabling practical and scalable quantum computing, particularly on today's noisy, resource-constrained quantum hardware. This work presents a comprehensive study of optimization strategies for q...