Intellectual Property India Publishes Patent Application for 'Full Adder Circuit And Methods For High Speed Computing Applications' Filed by Samsung Electronics Co. Ltd.

MUMBAI, India, Sept. 5 -- Intellectual Property India has published a patent application (202441011932 A) filed by Samsung Electronics Co. Ltd., Gyeonggi, Republic of Korea, on Feb. 20, 2024, for 'full adder circuit and methods for high speed computing applications.'

Inventor(s) include Mitesh Goyal; Mayuresh Dhanawade; Abhishek Ghosh; Utkarsh Garg; and Vinod.

The application for the patent was published on Sept. 5, under issue no. 36/2025.

According to the abstract released by the Intellectual Property India: "Full Adder circuit and methods for high speed computing applications A Full Adder (FA) circuit (600) includes a Carry Output Generation (COG) circuit (602) including a first set of inverter gates (606) to generate inverted input s...