Intellectual Property India Publishes Patent Application for 'Efficient Multiple Garbled Circuit Protocol' Filed by Google Llc

MUMBAI, India, June 6 -- Intellectual Property India has published a patent application (202517017255 A) filed by Google Llc, Mountain View, U.S.A., on Feb. 27, for 'efficient multiple garbled circuit protocol.'

Inventor(s) include Wang, Gang; and Yung, Marcel M. Moti.

The application for the patent was published on June 6, under issue no. 23/2025.

According to the abstract released by the Intellectual Property India: "This document describes systems and techniques for using cryptography, secure MPC, garbled circuits, and oblivious transfer to select digital components in ways that preserve user privacy and protects the data of each party involved in the selection process. In one aspect, a method includes receiving, from a content platfo...