Intellectual Property India Publishes Patent Application for 'A System For Low-Power Viterbi Decoder' Filed by Sipna College Of Engineering And Technology

MUMBAI, India, Oct. 31 -- Intellectual Property India has published a patent application (202421032682 A) filed by Sipna College Of Engineering And Technology, Amravati, Maharashtra, on April 25, 2024, for 'a system for low-power viterbi decoder.'

Inventor(s) include Zunzunwala, Jyoti J.; and Joshi, Atul S.

The application for the patent was published on Oct. 31, under issue no. 44/2025.

According to the abstract released by the Intellectual Property India: "The present invention is related to a system for low-power viterbi decoder. a low-power viterbi decoder is developed by analyzing the complete behavior of the decoder and designing its entire architecture with a traceback method for decoding. The architecture consists of a received d...