MUMBAI, India, June 6 -- Intellectual Property India has published a patent application (202517047433 A) filed by Neo Semiconductor, Inc., San Jose, U.S.A., on May 16, for '3d cells and array structures and processes.'

Inventor(s) include Hsu, Fu-Chang.

The application for the patent was published on June 6, under issue no. 23/2025.

According to the abstract released by the Intellectual Property India: "Various 3D cells, array structures and processes are disclosed. In an embodiment, a memory cell structure is provided that includes a vertical bit line, an insulator surrounding a first portion of vertical bit line, a continuous semiconductor layer surrounding the insulator and a second portion of the vertical bit line, and an extended po...