US Patent Issued to Micron Technology on Jan. 13 for "Method used in forming memory circuitry having non-SGD stair-step structures individually having the collective stairs in one of its flights to have at least two different horizontal depths" (American, Italian Inventors)

ALEXANDRIA, Va., Jan. 13 -- United States Patent no. 12,525,294, issued on Jan. 13, was assigned to Micron Technology Inc. (Boise, Idaho).

"Method used in forming memory circuitry having non-SGD stair-step structures individually having the collective stairs in one of its flights to have at least two different horizontal depths" was invented by Anna Maria Conti (Milan), Lifang Xu (Boise, Idaho) and Harsh Narendrakumar Jain (Boise, Idaho).

According to the abstract* released by the U.S. Patent & Trademark Office: "Memory circuitry comprising strings of memory cells comprises channel-material strings of memory cells extending through insulative tiers and conductive tiers in a memory-array region. The insulative and conductive tiers extend f...