GENEVA, July 29 -- RESONAC CORPORATION (9-1, Higashi-Shimbashi 1-chome, Minato-ku, Tokyo1057325), 株式会社レゾナック (東京都港区東新橋一丁目9番1号) filed a patent application (PCT/JP2025/001206) for "METHOD FOR MANUFACTURING SUBSTRATE WITH CONDUCTIVE VIA, SUBSTRATE WITH CONDUCTIVE VIA, METHOD FOR MANUFACTURING CIRCUIT BOARD WITH CONDUCTIVE VIA, AND CIRCUIT BOARD WITH CONDUCTIVE VIA" on Jan 16, 2025. With publication no. WO/2025/154773, the details related to the patent application was published on Jul 24, 2025.

Notably, the patent application was submitted under the International Patent Classific...